Leaf2Information

TLB and Cache information.

For convinient Cache information see also Leaf4Information.

Specification: Intel

Constructors

this
this(CpuInfo info)
Undocumented in source.

Members

Variables

dtlb
Tlb dtlb;

Data TLB

dtlb1
Tlb dtlb1;

Data TLB1

gdtlb
Tlb gdtlb;

Data TLB, giant pages

gutlb
Tlb gutlb;

Second-level unified TLB, giant pages

hdtlb
Tlb hdtlb;

Data TLB, huge pages

hdtlb1
Tlb hdtlb1;

Data TLB1, huge pages

hitlb
Tlb hitlb;

Intruction TLB, huge pages

hutlb
Tlb hutlb;

Second-level unified TLB, huge pages

il1
Cache il1;

Level-1 instuciton cache

itlb
Tlb itlb;

Intruction TLB

l1
Cache l1;

Level-2 data cache

l2
Cache l2;

Level-2 unified cache

l3
Cache l3;

Level-2 unified cache

noCacheInfo
bool noCacheInfo;

true if CPUID leaf 2 does not report cache descriptor information. use CPUID leaf 4 to query cache parameters.

noL2Or3
bool noL2Or3;
Undocumented in source.
prefetch
int prefetch;

prefetch line size

trace
int trace;

Cache trace

utlb
Tlb utlb;

Second-level unified TLB

Examples

//

auto leaf2 = Leaf2Information(_cpuid(2));

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